The present invention relates to an image display device capable of obtaining a high definition image output.
A conventional technique related to the present invention will be described hereinbelow with reference to FIGS. 12 and 13.
FIG. 12 is a diagram showing the configuration of a conventional image display device related to the invention. Display elements each constructed by a pixel switch 101 and a liquid crystal display capacitor 102 are arranged in a matrix within a display pixel area 111. The gate of the pixel switch 101 is connected to a gate line driver 110 via a gate line 109. One end of the pixel switch 101 is connected to an analog buffer 104 via a signal line 103. An output of a DA converter 105 is connected to the analog buffer 104. An output of a data latch 106 is connected to the DA converter 105. An output of a shift-register 107 and a digital input signal line 108 are connected to the data latch 106.
The operation of the conventional technique will be described hereinbelow. A digital input signal supplied from the digital input signal line 108 is latched by the data latch 106 in association with scanning of the shift-register 107. The digital input signal latched by the data latch 106 is converted to an analog signal voltage by the DA converter 105 and the analog signal voltage is input to the signal line 103 via the analog buffer 104. When the gate line driver 110 turns on the pixel switch 101 in a selected row via the gate line 109 at a predetermined timing, the analog signal voltage is written into the liquid crystal display capacitor 102 in the selected pixel row.
However, when an offset voltage as a difference between the input and output voltages of an amplifier as a component of the analog buffer 104 varies among the analog buffers 104, a vertical-stripe noise pattern occurs in a display image and a problem such that the picture quality deteriorates seriously occurs. When the analog buffer 104 is constructed by a poly-Si TFT, the problem becomes more conspicuous. A conventional countermeasure against the problem will be described hereinbelow.
FIG. 13 is a circuit configuration diagram of the analog buffer 104. An analog voltage received from an input terminal 127 is supplied to an amplifier constructed by an nMOS 121 and pMOS 122 via a first reset switch 124. An output of the amplifier is input to both the signal line 103 and a second reset switch 125. The other end of the second reset switch 125 is connected to the input of the amplifier via an offset canceling capacitor 123. The input terminal 127 is also connected to the first reset switch 124 and an input switch 126 in parallel, and the other end of the input switch 126 is connected between the second reset switch 125 and the offset canceling capacitor 123.
The operation of the analog buffer 104 will be described hereinbelow. First, the input switch 126 is in the off state and the first and second reset switches 124 and 125 are turned on. In this state, the input and output of the amplifier constructed by the nMOS 121 and the pMOS 122 are applied across the offset canceling capacitor 123, so that an offset voltage as a difference between the input and output voltages of the amplifier is supplied to the offset canceling capacitor 123. Subsequently, when the first and second reset switches 124 and 125 are turned off and the input switch 126 is turned on, a voltage obtained by subtracting the offset voltage value which has been supplied to the offset canceling capacitor 123 is supplied to the amplifier. As a result, the offset voltage of the amplifier is canceled, and the same voltage as that input to the input terminal 127 can be output from the amplifier to the signal line 103. An example of such a conventional technique is specifically described in, for instance, xe2x80x9cAsia Display 98, Proceedingsxe2x80x9d, pp. 285 to 288.
As described above, the conventional technique aims at canceling variations in an offset voltage as a difference between input and output voltages of an amplifier by inserting the capacitor in which the offset voltage is stored at the input of the amplifier by change-over of the switch. According to the method, however, in theory, the input terminal of the amplifier has to be set in a DC floating state and then the amplifier is driven. In this case, when the change-over switch for the capacitor is switched off and the input terminal of the amplifier enters a DC floating state, application of feed-through noise of the change-over switch to the input of the amplifier cannot be avoided. It causes random noise or variations among the amplifiers, and the picture quality accordingly deteriorates. In the conventional technique, the first reset switch 124 corresponds to the change-over switch.
An object of the invention is to provide a novel method of canceling an offset voltage.
The object can be achieved by an image display device including: a display screen in which a plurality of display pixels in each of which a liquid crystal capacitor for displaying an image and a pixel switch for writing an image signal voltage into the liquid crystal capacitor are connected in series are arranged in a matrix, image signal voltage generating means for generating the image signal voltage which changes alternately between a positive voltage and a negative voltage every one of even-numbered and odd-numbered fields to the liquid crystal capacitor, and impedance converting means for reducing an output impedance of the image signal voltage generating means and transmitting the image signal voltage to the pixel switch, wherein the image display device further comprises drive voltage shifting means for shifting a voltage of driving the impedance converting means between a positive voltage area and a negative voltage area every one of the even-numbered and odd-numbered fields in accordance with the polarity of the image signal voltage.